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TC3404
+1.8V Low Power, Quad Input, 16-Bit Sigma-Delta A/D Converter with a Power Fault Monitor
Features
* 16-bit Resolution at Eight Conversions Per Second, Adjustable Down to 10-bit Resolution at 512 Conversions Per Second * 1.8V - 5.5V Operation, Low Power Operating 280A; Sleep: 37A * Two Differential and Two Single-ended Inputs with Built-in Multiplexer * microPortTM Serial Bus Requires only two Interface Lines * Uses Internal or External Reference * Automatically Enters Sleep Mode when not in use * Early Warning Power Fail Detector, also suitable as Wake-Up Timer Operational in Shutdown Mode
Package Type
16-Pin PDIP 16-Pin QSOP
IN1+ IN2+ IN3+ IN3IN4+ IN4REFIN GND 1 2 3 4 5 6 7 8 16 15 14 V
DD
SCLK A0 A1 PFI PFO SDAT REFOUT
TC3404
13 12 11 10 9
Applications
* Consumer Electronics, Thermostats, CO Monitors, Humidity Meters, Security Sensors * Embedded Systems, Data Loggers, Portable Equipment * Medical Instruments
General Description
The TC3404 is a low cost, low power analog-to-digital converter based on Microchip's Sigma-Delta technology. It will perform 16-bit conversions (15-bit plus sign) at up to eight per second. The TC3404 is optimized for use as a microcontroller peripheral in low cost, battery operated systems. A voltage reference is included, or an external reference can be used. The TC3404's 2-wire microPortTM digital interface is used for starting conversions and for reading out the data. Driving the SCLK line low starts a conversion. After the conversion starts, each additional falling edge (up to six) detected on SCLK for t4 seconds reduces the A/D resolution by one bit and cuts conversion time in half. After a conversion is completed, clocking the SCLK line puts the MSB through LSB of the resulting data word onto the SDAT line, much like a shift register. The part automatically sleeps when not performing a data conversion. The TC3404 is available in a 16-Pin PDIP and a 16-Pin QSOP package.
Device Selection Table
Part Number TC3404VPE Package 16-Pin PDIP (Narrow) Temperature Range 0C to +85C 0C to +85C
TC3404VQR 16-Pin QSOP Narrow)
2002 Microchip Technology Inc.
DS21413B-page 1
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TC3404
Typical Application
VBATT
Input 1 Input 2 Input 3 Input 4
IN1+ IN2+ IN3+ IN3IN4+ IN4-
VDD SDAT SCLK A0 A1 VBATT R7 100k I/01 I/02 I/03 I/04
V
CC
TC3404
Controller
REFIN REFOUT C1 0.1F R3 390 10%
PFO PFI VBATT R4 1M 10% C2 10F
I/05 I/06
Functional Block Diagram
VDD IN1 + - IN2 + - IN3+ IN3IN4+ IN4+ - + - SET DQ CLR 1 of 4 AMux CONV done -D Modulator CONVCLK Data Shift Reg. CLKOUT SDAT 1.193V REFOUT x2 REFIN
TC3404
A0
Clock Generator and Start Control Circuitry Conv.
SCLK
A1
SET DQ CLR PFO
PFI
- + 1.205V
GND
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DS21413B-page 2
2002 Microchip Technology Inc.
TC3404
1.0 ELECTRICAL CHARACTERISTICS
*Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings*
Supply Voltage ..................................................... 6.0V Voltage on Pin: PFO ..................................... GND - 0.3V) to 5.5V Input Voltage (All Other Pins): ............................... (GND - 0.3V) to (VDD + 0.3V) Operating Temperature Range ................. 0C to 85C Storage Temperature ......................... 65C to +150C
TC3404 DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: TA = 25C and VDD = 2.7V, unless otherwise specified. Boldface type specifications apply for temperatures of 0C to 85C. VREF = 1.25V, Internal Clock Frequency = 520kHz. Symbol Power Supply VDD IDD IDDSLEEP Accuracy RES INL VOS VNOISE CMR FSE PSRR INn+ VIN Input Voltage Absolute Voltage Range on INn Input Bias Current CIN RIN Input Sampling Capacitance Differential Input Resistance -- GND -- -- -- -- -- 1 2 2.0 VDD VDD 100 -- -- V V nA pF M Note 2 Note 1 Resolution Integral Non-Linearity Offset Error Referred to input Common Mode Rejection Full Scale Error Power Supply Rejection Ratio -- -- -- -- -- -- -- 16 .0038 -- 60 75 0.4% 75 -- -- 0.9 -- -- -- -- Bits %FSR %FSR VDD = 2.7V IN+, IN- = 0V At DC VDD = 2.5V to 3.5V Supply Voltage Supply Current, During Data Conversion Supply Current, Sleep Mode 1.8 -- -- -- -- 280 37 46 5.5 -- 50 60 V Parameter Min Typ Max Unit Test Conditions
A A A
TA = +25C
Vrms
dB %FS dB
REFIN, REFOUT VREF IREF VREFOUT REFSINK REFSRC REFIN Voltage Range REFIN Input Current REFOUT Voltage REFOUT Current Sink Capability REFOUT Current Source Capability 0 -- -- -- 300 -- 1 1.193 10 -- 1.25 -- -- -- -- V A V A
A
Note 1: Differential input voltage defined as (VIN+ - VIN -). 2: Resistance from INn+ to INn- or INn to GND. 3: @ VDD = 1.8V, ISOURCE 200A.
2002 Microchip Technology Inc.
DS21413B-page 3
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TC3404
TC3404 DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: TA = 25C and VDD = 2.7V, unless otherwise specified. Boldface type specifications apply for temperatures of 0C to 85C. VREF = 1.25V, Internal Clock Frequency = 520kHz. Symbol SCLK, A0, A1, ENABLE VIL VIH ILEAK SDAT, PFO VOL VOH VDDMIN PFI VCCPFI VTHR PFI Input Voltage Range PFI Input Current Threshold (VTH, PFI) Threshold Hysteresis Threshold Tempco 0 -0.1 -- -- -- -- .01 1.23 30 30 VDD 0.1 -- -- -- V Output Low Voltage Output High Voltage (SDAT) Minimum VDD for PFO Valid -- 0.9 x VDD -- -- -- 1.1 0.4 -- 1.3 V V IOL = 1.5mA ISOURCE = 400A (Note 3) Input Low Voltage Input High Voltage Leakage Current -- 0.7 x VDD -- -- -- 1 0.3 x VDD -- -- V V Parameter Min Typ Max Unit Test Conditions
A
A
A
V mV ppm/C
Note 1: Differential input voltage defined as (VIN+ - VIN -). 2: Resistance from INn+ to INn- or INn to GND. 3: @ VDD = 1.8V, ISOURCE 200A.
TC3404 AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: TA = 25C and VDD = 2.7V, unless otherwise specified. Boldface type specifications apply for temperatures of 0C to 85C. VREF = 1.25V, Internal Clock Frequency = 520kHz. Symbol t1 t2 t3 Parameter Resolution Reduction Clock Width Resolution Reduction Clock Width Conversion Time (15-bit Plus Sign) Conversion Time (14-bit Plus Sign) Conversion Time (13-bit Plus Sign) Conversion Time (12-bit Plus Sign) Conversion Time (11-bit Plus Sign) Conversion Time (10-bit Plus Sign) Conversion Time (9-bit Plus Sign) t4 t5 t6 t7 t8 t11 Resolution Reduction Window SCLK to Data Valid Address Setup Address Hold Acknowledge Delay RESET Delay Min 1 1 -- -- -- -- -- -- -- -- 1000 0 1000 -- 5 Typ -- -- 125 t3/2.0 t3/4.0 t3/7.8 t3/15.1 t3/28.6 t3/51.4 t3/85.7 -- -- -- -- -- Max -- -- -- -- -- -- -- -- -- -- -- -- -- 1000 64 Unit sec sec msec msec msec msec msec msec msec msec nsec nsec nsec nsec sec Test Conditions Width of SCLK (Negative) Width of SCLK (Positive) 16-bit Conversion, TA = 25C (Note 1) 15-bit Conversion 14-bit Conversion 13-bit Conversion 12-bit Conversion 11-bit Conversion 10-bit Conversion Width of SCLK SCLK Falling Edge to SDAT Valid Address Valid to SCLK SCLK to Address Valid Hold SCLK to SDAT Delay Delay VTH Falling at 10V/msec to RESET Low
Note 1: Nominal temperature drift is -2830ppm/C for temperature less than 25C and -1340ppm/C for temperatures greater than 25C.
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TC3404
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
Pin No. (16-Pin PDIP (16-Pin QSOP) 1 2 3 4
PIN FUNCTION TABLE
Symbol IN1+ IN2+ IN3+ IN3Description Analog Input. This is the positive terminal of a true differential input with the negative input tied internally to GND. See Section 1.0, Electrical Characteristics. Analog Input. This is the positive terminal of a true differential input with the negative input tied internally to GND. See Section 1.0, Electrical Characteristics. Analog Input. This is the positive terminal of a true differential input consisting of IN3+ and IN3-. VIN3 = (IN3+ - IN3-). See Section 1.0, Electrical Characteristics. Analog Input. This is the negative terminal of a true differential input consisting of IN3+ and IN3-. VIN3 = (IN3+ - IN3-) IN3- can swing to, but not below, ground. See Section 1.0, Electrical Characteristics. Analog Input. This is the positive terminal of a true differential input consisting of IN4+ and IN4-. VIN4 = (IN4+ - IN4-). See Section 1.0, Electrical Characteristics. Analog Input. This is the negative terminal of a true differential input consisting of IN4+ and IN4-. VIN4 = (IN4+ - IN4-) IN4- can swing to, but not below, ground. See Section 1.0, Electrical Characteristics. Analog Input. The converter's reference voltage is the differential between this pin and ground times two. It may be tied directly to REFOUT or scaled using a resistor divider. Any user supplied reference voltage less than 1.25 may be used in place of REFOUT. Ground Terminal. Analog Output. The internal reference connects to this pin. It may be scaled externally, and tied to the REFIN input to provide the converter's reference voltage. Care must be taken in connecting external circuitry to this pin. This pin is in a high impedance state during Sleep mode. See Section 1.0, Electrical Characteristics. Digital Output (push-pull). This is the microPortTM serial data output. SDAT is driven low while the TC3404 is converting data, effectively providing a "busy" signal. After the conversion is complete, every high to low transition on the SCLK pin puts a bit from the resulting data word on the SDAT pin (from MSB to LSB). Digital Output (open drain). This is the output of the internal threshold detector. When PFI is less than the internal reference, PFO is driven low. Analog Input. This is the positive input to an internal comparator used as a threshold detector. The negative input is tied to an internal reference. Digital Input. Controls analog multiplexer in conjunction with A0 to select one of the four Input channels. This address is latched at the falling edge of the SCLK, which starts an A/D conversion. A1, A0 = 00 = Input 1; 01 = Input 2; 10 = Input 3; 11 = Input 4. Digital Input. Controls analog multiplexer in conjunction with A1 to select one of four Input channels. This address is latched at the falling edge of the SCLK, which starts an A/D conversion. A1, A0 = 00 = Input 1; 01 = Input 2; 10 = Input 3; 11 = Input 4. Digital Input. This is the microPortTM serial clock input. The TC3404 comes out of Sleep mode and a conversion cycle begins when this pin is driven low. After the conversion starts, each additional falling edge (up to six) detected on SCLK for t4 seconds reduces the A/D resolution by one bit. When the conversion is complete, the data word can be shifted out on the SDAT pin by clocking the SCLK pin. Power Supply Input.
5 6
IN4+ IN4-
7
REFIN
8 9
GND REFOUT
10
SDAT
11 12 13
PFO PFI A1
14
A0
15
SCLK
16
VDD
2002 Microchip Technology Inc.
DS21413B-page 5
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TC3404
3.0 DETAILED DESCRIPTION
TABLE 3-1:
The TC3404 has a 16-bit sigma-delta A/D converter. It has two differential single-ended inputs, an analog multiplexer and an early warning Power Fail detector. See the Typical Application circuit and the Functional Block diagram. The key components of the TC3404 are described below. Also refer to Figure 3-5, A/D Operational Flowchart and the Timing Diagrams, Figure 3-1, Figure 3-2 and Figure 3-3.
DATA CONVERSION WORD VS. VOLTAGE INPUT (REFIN = 1.193V)
INn+ - INn- (Volts) 2.38596 (Positive Full Scale) 72.8 E -6 0 -72.8 E -6 -2.38596 (Negative Full Scale) Reserved Code
Data Word 0111 1111 1111 1111 0000 0000 0000 0001 0000 0000 0000 0000 1111 1111 1111 1111 1000 0000 0000 0001 1000 0000 0000 0000
3.1
A/D Converter Operation
When the TC3404 is not converting, it is in Sleep mode with both the SCLK and SDAT lines high. An A/D conversion is initiated by a high to low transition on the SCLK line at which time the internal clock of the TC3404 is started and the address value (A0 and A1) is internally latched. The address value steers the analog multiplexer to select the input channel to be converted. Each additional high to low transition of SCLK (following the initial SCLK falling edge) during the time interval t4, will decrement the conversion resolution by one bit and reduce the conversion time by one half. The time interval t4 is referred to as the resolution reduction window. The minimum conversion resolution is 10-bits so any more than 6 SCLK transitions during t4 will be ignored. After each high to low transition of SCLK, in the t4 interval, the SDAT output is driven high by the TC3404 to acknowledge that the resolution has been decremented. When the SCLK returns high or the t4 interval ends, the SDAT line returns low (see Figure 3-2). When the conversion is complete SDAT is driven high. The TC3404 now enters Sleep mode and the conversion value can be read as a serial data word on the SDAT line.
The SCLK input has a filter which rejects any positive or negative pulse of width less than 50nsec to reduce noise. The rejection width of this pulse can vary between 50nsec and 750nsec depending on processing parameters and supply voltage. Figure 3-1 and Table 3-2 show information for determining the mode of operation for the TC3401 by recording the value of SDAT for SCLK in a high, then low, then high state. For example, if SCLK goes through a 1-0-1 transition and the corresponding values of SDAT are 1-1-0, then the SCLK falling edge started a new data conversion. A 0-1-0 for SDAT would have indicated a resolution reduction had occurred. This is useful if the microcontroller has a Watchdog Reset or otherwise loses track of where the TC3404 is in the conversion and data readout sequence. The microcontroller can simply transition SCLK until it "finds" a Start Conversion condition.
FIGURE 3-1:
SCLK, SDAT LOGIC STATE DIAGRAM
SCLK
3.2
Reading the Data Word
SDAT A B C
After the conversion is complete and SDAT goes high, the conversion value can be clocked serially onto the SDAT line by high to low transitions of the SCLK. The data word is in two's compliment format with the sign bit clocked onto the SDAT line, first followed by the MSB and ending in the LSB. For a 16-bit conversion the data word would consist of a sign bit followed by 15 magnitude bits, Table 3-1 shows the data word versus input voltage for a 16-bit conversion. Note that the full scale input voltage range is (2 REFIN - 1LSB). When REFOUT is fed back directly to REFIN, an LSB is 73V for a 16-bit conversion, as REFOUT is typically 1.193V. Figure 3-4 shows typical SCLK and SDAT waveforms for 16, 12 and 10-bit conversions. Note that any complete convert and read cycle requires 17 negative edge clock pulses. The first is the convert command. Then, up to six of these can occur in the resolution reduction window, t4, to decrement resolution. The remaining pulses clock out the conversion data word.
TABLE 3-2:
A 1 0 x x B 1 1 1 0
SCLK, SDAT LOGIC STATE
C 0 0 1 0 Status Start Conversion Resolution Reduction Data Transfer Data Transfer or Busy*
*Note: The code X00 has a dual meaning: Data Transfer or
Busy converting. To avoid confusion, the user should send only the required number of pulses for the desired resolution, then wait for SDAT to rise to 1, indicating conversion is complete before clocking SCLK again to read out data bits.
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DS21413B-page 6
2002 Microchip Technology Inc.
TC3404
FIGURE 3-2:
t2 SCLK t1
CONVERSION AND DATA OUTPUT TIMING
t4 SDAT
t8
t8 DN (MSB)
t5 DN-1 DN-2
Sleep Mode D0 (LSB)
t3 Data Conversion Complete t6 t7 A0, A1 Start Conversion and Resolution Control Timing Data Output Timing
FIGURE 3-3:
RESET AND POWER FAIL TIMING
Volts
VDD PFI
1.23 1.20 1.1 0
Hysteresis
Time t10 t10 t10 t10
PFO
Power Fail Comparator Timing
2002 Microchip Technology Inc.
DS21413B-page 7
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TC3404
FIGURE 3-4: SCLK AND SDAT WAVEFORMS FOR 16, 12 AND 10-BIT CONVERSIONS
16-bit Data Conversion, Data Word A5A5h SCLK t3a SDAT Data Conversion Complete 16-bit Data Conversion, Long Start Pulse, Data Word 5A5Ah SCLK > t3a SDAT Data Conversion Complete 12-bit Conversion, Data Word = AB3h SCLK < t4 SDAT Data Conversion Complete 10-bit Conversion with "Extra" Data Reduction Clocks, Data Word = 3A4h SCLK < t4 t3g SDAT Data Conversion Complete
t3e
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DS21413B-page 8
2002 Microchip Technology Inc.
TC3404
FIGURE 3-5: A/D OPERATIONAL FLOWCHART
POR
SDAT = Low
Sleep SDAT = High
CONVCLK = 2m? (Conversion Done?)
No
Yes
No
SCLK Hgh to Low? Yes
Power Down Analog, Conversion Complete, SDAT = High
Power Up Analog, Start CONVCLK (= 0), Start Conversion, Resolution = 2m (m = 16), Latch Input Channel Address (if applicable).
SCLK High to Low? Yes
No
SCLK Low to High transition? Yes SDAT = Low
No SDAT = Dm; m=m-1
m 0? CONVCLK < 29? Yes SDAT = High Internal Reset No SCLK High to Low? Yes Sleep No No
Yes
No
A/D Resolution > 210? Yes Reduce A/D Resolution by 1-bit (m = m - 1); SDAT = High
2002 Microchip Technology Inc.
DS21413B-page 9
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TC3404
3.3 Power Fail Detector
The Power Fail detector is a comparator in which the inverting input is connected to the internal voltage reference. The non-inverting input is the PFI pin of the TC3404 and the PFO pin is the active low, open drain output. This comparator is suitable as an early warning fail or low battery indicator. In a typical application, where a voltage regulator is being used to supply power to a system, the Power Fail comparator would monitor the input voltage to the regulator while the VDD monitor would measure the output voltage of the regulator. Both PFO and RESET would drive interrupt pins of a microcontroller. The Power Fail detector may be used as a Wake-up or Watchdog Timer. The Typical Application circuit shows an RC network on PFI with the capacitor tied to a tristated C I/O pin. If R4 is 1 M and C2 is 10F, the time constant is roughly ten seconds. The C resets the RC network by driving the I/O tied to PFI low and then tristating it. The RC network will ramp to 1.23V in roughly 9 seconds, assuming a VBATT of 3.0V. With PFO tied to a C input or interrupt, the C will see a low to high transition on PFO when the voltage on PFI exceeds 1.23V. The PFO output is specified to be valid for V DD = 1.3 to 5.5V.
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DS21413B-page 10
2002 Microchip Technology Inc.
TC3404
4.0
4.1
PACKAGING INFORMATION
Package Marking Information
Package marking data not available at this time.
4.2
Taping Forms
Component Taping Orientation for 16-Pin QSOP (Narrow) Devices
User Direction of Feed
PIN 1
W
P Standard Reel Component Orientation for TR Suffix Device
Carrier Tape, Reel Size, Number of Components Per Reel and Reel Size
Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size
16-Pin QSOP (N)
12 mm
8 mm
2500
13 in
2002 Microchip Technology Inc.
DS21413B-page 11
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TC3404
4.3 Package Dimensions
16-Pin PDIP (Narrow)
PIN 1
.270 (6.86) .240 (6.10)
.045 (1.14) .030 (0.76) .770 (19.56) .740 (18.80) .200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92) .310 (7.87) .290 (7.37)
.040 (1.02) .020 (0.51)
.014 (0.36) .008 (0.20) .400 (10.16) .310 (7.87)
10 MAX.
.110 (2.79) .090 (2.29)
.070 (1.78) .045 (1.14)
.022 (0.56) .015 (0.38) Dimensions: inches (mm)
16-Pin QSOP (Narrow)
PIN 1
.157 (3.99) .150 (3.81) .244 (6.20) .228 (5.80)
.196 (4.98) .189 (4.80)
.010 (0.25) .004 (0.10) .069 (1.75) .053 (1.35) 8 MAX.
.010 (0.25) .007 (0.19) .050 (1.27) .016 (0.41) Dimensions: inches (mm)
.025 (0.635) TYP.
.012 (0.31) .008 (0.21)
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DS21413B-page 12
2002 Microchip Technology Inc.
TC3404
SALES AND SUPPORT
Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
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DS21413B-page 13
TC3404
NOTES:
DS21413B-page 14
(c) 2002 Microchip Technology Inc.
TC3404
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights.
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Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro (R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001 certified.
2002 Microchip Technology Inc.
DS21413B-page 15
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Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus 1 V. Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883
Toronto
6285 Northam Drive, Suite 108 Mississauga, Ontario L4V 1X5, Canada Tel: 905-673-0699 Fax: 905-673-6509
India
Microchip Technology Inc. India Liaison Office Divyasree Chambers 1 Floor, Wing A (A3/A4) No. 11, O'Shaugnessey Road Bangalore, 560 025, India Tel: 91-80-2290061 Fax: 91-80-2290062
United Kingdom
Microchip Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820
05/01/02
(c)
DS21413B-page 16
2002 Microchip Technology Inc.
*B31412SD*

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